Reusable IP Core

• Reduce Time-to-Market
• Eliminate Design Risks
• Reduce Development Costs

MemConnect™ is a customizable, and silicon proven IP solution for memory system design. It

supports any combinations of SDR SDRAM, DDR, DDR2, Mobile SDR, FCRAM, Flash, EEPROM, SRAM and NAND Flash, all in one IP core. A complete line of user interfaces and a built-in DMA controller for shared memory access within an SOC design are supported.

Silicon proven and PCI-SIG compliant, the Eureka PCI-Express controller IP core passes all PCI-SIG compliant and interoperability tests. Available with low cost development kit. Supports standard PIPE interface for ASIC and FPGA applications. 

New system and peripheral controller cores. These are the companion chip-sets for different CPUs. They are the CPU's connection to the outside world. High bandwidth data transfer between CPU, memory, PCI bus and other peripheral cores with point-to-pint connection technology.

Bus bridges between different CPU bus and external buses: AHB-to-PCI, AHB-to-AHB, PowerPC-to-AHB, SysAD-to-AHB, PowerPC-to-PowerPC, PowerPC-to-PCI, PCI-to-PCI, PCI-to-ISA.

The latest member to the Eureka family of IP cores supports SD memory, SDIO and MMC interface. This controller adds SD connectivity immediately to any SOC design. Conform to the latest SD memory and SDIO specification.