|New PCI bridge and memory controller cores take connectivity to board level for user-customizable processor
Elstree, UK, 03 December 2001 -- New PCI host bridge and memory controller
interface intellectual property (IP) cores are now available for the ARCtangent-A4
processor, a leading user-customizable 32-bit processor. ARC International plc (LSE: ARK),
trading through its subsidiaries as ARC Cores, announced today that Eureka Technology
of Los Altos (CA, USA), a leading IP core provider for system-on-chip (SoC)
designs, will now make available the plug-in IP modules it developed for the
ARCtangent processor to connect to memory devices and the PCI bus. Eureka has
already delivered ARC processor-based solutions to Fujitsu Microelectronics
America, Inc. earlier this year. .
Adding a PCI interface is a significant step as it takes processor
connectivity from the SoC level to board level. This adds an extra interface
capability to the ARCtangent processor, enabling single-chip PCI solutions
suitable for high-bandwidth applications requiring the high performance PCI
specification 2.2 protocol.
Eureka Technology provides two IP cores for the ARCtangent processor:
- EP503 memory and peripheral controller, which interfaces between
the processor's arbitration unit and provides access to external SDRAM, FLASH,
and PCI host bridge and peripheral slave devices;
- EP453 PCI host bridge which contains bus master, bus target, and
configuration initiator function, to support instruction transfer in both directions
allowing an ARCtangent processor core to access devices on the PCI
(specification 2.2 protocol) bus and allows a remote PCI bus master to access
the system internal resources through the client interface and memory arbitration units.
The EP503 memory controller is optimized to serve as the slave device for
the ARCtangent bus arbitration unit. The memory controller automatically
handles SDRAM and FLASH timing such as row and column latency, precharge
timing, and data burst length. All these timing parameters are set by the memory
controller on system reset and can be programmed by the user during run-time to
optimize system performance.
The EP503 supports all industrial standard SDRAM organizations, ranging
from 16Mbit to 256Mbit devices, and from X4 data width to X32 data width.
Data bandwidth between the FLASH devices is programmable through read/write
access time parameters in the memory controller. Interfacing to user-defined
slave devices is through a user-friendly interface from the EP503. Access timing
to the slave device is programmable. Address and data bus can be shared
among all memory and slave devices. The EP503 is designed to support
external SDRAM and FLASH while the slave device and PCI host bridge can
be either on-chip or off-chip.
PCI host bridge
The EP453 fully supports the PCI specification 2.2 protocol, and is
designed for ASIC and FPGA implementations in various system environments.
It is a bus interface unit designed for efficient interface between the ARCtangent
processor and the PCI bus, performing all the data transfer functions necessary
for the bus mastering device to access data through the PCI bus. It supports
burst data transfer to maximize data bandwidth. The target function allows
other PCI masters to access internal system resources. It supports high-speed
bus request and arbitration to minimize transfer latency. The host bridge operates
in two clock domains, the CPU bus clock and the PCI bus clock - the two clock
domains can be asynchronous to each other. Single and burst data transfers
are supported both as bus master and bus target. The EP503 interfaces directly
to the ARCtangent peripheral controller to provide access by the CPU core. The
host bridge core allows the CPU to initialize the entire system during power-up
reset using standard PCI protocol.
Functionality of both IP cores has been fully verified on simulation and
demonstrated in silicon. The deliverables of the memory controller and PCI
host bridge includes RTL source code in either Verilog or VHDL formats, test
bench with test vectors, and data sheet top-level design templates. They are
available for licensing directly from Eureka Technology (detailed information
is available at http://www.eurekatech.com/products/arc/default.htm).
Customers can purchase a full license for the ARCtangent processor that includes
the core configuration utilities, development tools and the ARCangelTM prototyping
system directly from ARC Cores. Integration of the ARCtangent processor can
be carried out by any of ARC's worldwide network of design centers.
About Eureka Technology
Eureka Technology is a leading intellectual property (IP) provider for PLD and ASIC
designers. The company offers a wide range of silicon-proved system core logic functions
and peripheral functions for systems based on PCI bus and various embedded CPUS. These
IP cores are designed to improve the design time-to-market delay, eliminate design risks,
and reduce development costs. Founded in 1993, the company has a strong customer base
in the United States, Japan and Europe. For more information about the company, visit
or send email to firstname.lastname@example.org.
About ARC International
ARC International plc is a leading developer of user-customizable, high-performance
32-bit processor cores (including ARCtangent), development tools, peripherals
and other intellectual property (IP), enabling reduced time to market for system-on-chip
products. ARC's 58 customers include Conexant Systems, Cypress Semiconductor,
Fujitsu Microelectronics, IBM, Infineon Technologies, QLogic, SanDisk and Sun
Microsystems. Products based on ARC's technology include digital still cameras, set-top
boxes, and network processors. MetaWare Inc., Precise Software Technologies Inc., and
VAutomation Inc. are wholly owned subsidiaries of ARC International, providing
software development tools, hardware and software intellectual property and
real-time operating systems for an integrated approach to system-on-chip development.
ARC's third-party partners include Cadence, Flextronics, Intrinsix, Synopsys,
TSMC, UMC, Wind River, and Xilinx. ARC International plc and its group companies
employ more than 200 people at its headquarters in Elstree, England, and in
research and development, sales, and marketing offices across North America,
Europe, and Israel. ARC International plc is listed on the London Stock Exchange
(LSE:ARK). The company's web site is at www.arccores.com.
Statements made in this
press release that are not historical facts include forward-looking statements
that involve risks and uncertainties. Important factors that could cause actual
results to differ from those indicated by such forward-looking statements include,
among others, market acceptance of the ARC technology; fluctuations in and unpredictability
of the Company's quarterly results; general economic and business conditions;
regulatory policies adopted by governmental authorities; assumptions regarding
the Company's future business strategy; changes in technology; competition;
ability to attract and retain qualified personnel; risks associated with the
Company's international operations; and other uncertainties that are discussed
in the "Investment Considerations" section of the Company's listing particulars
dated 28 September 2000 filed with the United Kingdom Listing Authority and
the Registrar of Companies in England and Wales.
ARC International (UK) Ltd.
and ARC Cores, Inc., both of which are wholly owned subsidiaries of ARC International
plc, trade under the name of ARC Cores. ARC, the ARC logo, ARCtangent, ARCangel,
ARCompact, ARChitect, ARCform, BlueForm, and CASSEIA are trademarks of ARC International
(UK) Ltd. All other brands or product names are the property of their respective