LOS ALTOS, California, July 15, 2005 - Eureka Technology Inc., a leading intellectual property (IP) core provider, today announces the successful completion of the demonstration and validation of its PCI Express Controller Core. Eureka Technology’s rigorous validation process consists of four components: (1) PCI Express Configuration Test suite (PCIE-CV) published by PCI-SIG, (2) PCI Express Link and Transaction Protocol Test using industrial standard E2969A PCI Express Protocol Tester by Agilent Technologies, (3) demonstration system consisting of Rambus's PCI Express physical layer (PHY) cells, Eureka's PCI Express Controller Core, and software operating in Windows XP environment, and (4) interoperability test between Eureka’s PCI Express Controller Core and many PCI Express systems based on chipsets from various manufacturers.

Eureka’s PCI Express Controller Core is designed for both ASIC and FPGA implementations. The Controller Core includes the Transaction Layer, Data Link Layer and Physical Layer of the PCI Express Specification. It conforms to the latest 1.0a revision and it supports industrial standard PIPE interface for on-chip PHY core and stand-alone off-chip PHY devices.

"We are very pleased with the validation results and interoperability between our core and various systems and Rambus’s PCI Express PHY cells," said Simon Lau, President of Eureka Technology. "By building upon our experience on PCI and PCI-X standards, we are able to deliver the much higher performance of PCI Express technology to our customers quickly. The PCI Express IP Core once again demonstrates our commitment to bus interface technologies and continue investment in bringing state-of-the-art products to our customers."

With technology independent design methodologies, the PCI Express Controller Core can be implemented virtually in all ASIC and FPGA technologies available today. While supporting the latest PCI-Express standard, the core shares the same user interface as existing PCI and PCI-X controller core, ensuring an easy migration for customers to PCI Express standard. The common user interface also allows the PCI Express Controller Core to be integrated easily with other proven IP cores such as system controller and MemConnect™ memory controller.

For more information about PCI Express Controller Core and the demonstration system from Eureka Technology, please visit http://www.eurekatech.com/products/pci

About Eureka Technology

Eureka Technology, Inc. is an leading intellectual property (IP) provider for ASIC, FPGA and system designers. The company specializes in the integration and customization of standard IP core to meet customer requirements. Eureka offers a wide range of silicon proven system core logic and peripheral function cores for different CPU and bus standards including PowerPC™, ARM™, MIPS™, PCI™, PCI-X™, PCI Express™, Cardbus™, SDR/DDR SDRAM, CompactFlash and PCMCIA™. These IP cores are designed to improve the design time-to-market, eliminate design risks, and reduce development costs for System-on-chip (SoC) designs. Located in Silicon Valley, California, Eureka Technology has pioneered the use of IP cores as a standard methodology in IC design. Throughout its long history in the IP business, Eureka has licensed hundreds of IP cores to many leading companies in the semiconductor and electronic industries. With customer base in the US, Europe, Japan and other parts of Asia, the company is specially honored to earn many repeated business from its customers after their initial successes. For more information on Eureka Technology, please visit its World Wide site at http://www.eurekatech.com or send email to info@eurekatech.com.

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Contact:
Annie Leung
Eureka Technology Inc.
Tel: 650 960 3800
Email: annie@eurekatech.com
Web site: http://www.eurekatech.com

MemConnect is a trademarks of Eureka Technology Inc. All other trademarks are properties of their respective owners.