|Eureka Technology Successfully Demonstrated PCI Express Compliant Platform
LOS ALTOS, California, September 30, 2005 - Eureka Technology Inc., a leading intellectual property (IP)
core provider, today announced that a PCI Express hardware demonstration system composed of Eureka’s
PCI* Express Controller IP core and PCI Express PHY cells from Rambus Inc. has successfully completed
rigorous PCI-SIG compliance testing including protocol, electrical, configuration, and interoperability tests. The
PCI Express demonstration system is a result of the collaboration and partnership between Eureka Technology
and Rambus. The system passed all testing at the PCI-SIG Compliance Workshops and is certified at the
PCI-SIG integrators list.
"With Rambus’ silicon proven PCI Express PHY cells, we are able to demonstrate the compatibility
of our PCI Express Controller cores easily in silicon. This demonstration also shows the many benefits of
using high quality IP cores, such as reduction in design time, risk, and cost," said Simon Lau,
president of Eureka Technology. "Our customers will be able to benefit from having a real turnkey
solution and smooth migration to PCI Express by using the combined IP cores."
"Our goal is to ensure our PHYs are the most interoperable with as many different controller cores
as possible, giving our customers choice in choosing the PCI Express solution that best fits their needs,"
said Jean-Marc Patenaude, director of marketing for the Platform Solutions Group at Rambus. "Working
with Eureka to ensure compatibility and interoperability is a critical step in achieving our goal and integrating
their proven solution to meet the increasing demands of PCI Express applications."
The Eureka PCI Express Controller Core includes the Transaction Layer, Data Link Layer and Physical Layer
of the PCI Express Specification. It conforms to the latest 1.0a revision and supports industrial standard PIPE
interface for on-chip PHY core and external PHY chips. With technology independent design methodologies,
Eureka’s PCI Express Controller Core can be implemented virtually in all ASIC and FPGA technologies available
today. While supporting the latest PCI-Express standard, the core shares the same user interface as existing
PCI and PCI-X controller core, ensuring an easy migration for customers to PCI Express standard. The common
user interface also allows the PCI Express Controller Core to be integrated easily with Eureka’s other proven IP
cores such as system controller and MemConnect memory controller. For more information about the PCI Express controller core, please visit
Rambus’ PCI Express PHY cells are complete serial communication cells optimized for implementing the
physical layer of the PCI Express standard. The silicon-proven serial interfaces feature point-to-point, full duplex
signaling and support up to a 3.2Gbps data rate. The Rambus PCI Express PHY design is available on multiple
foundry and captive processes at process nodes ranging from 180nm to 65nm. The PHYs are in production in
high-volume applications such as PC graphics, chipsets, switch and bridge chips, and supported by a
comprehensive suite of digital controllers and support services to provide chip developers with a complete system
About Rambus Inc.
Rambus is one of the world's leading providers of advanced chip interface products and services. Since its
founding in 1990, the company's innovations, breakthrough technologies and integration expertise have helped
industry-leading chip and system companies solve their most challenging and complex I/O problems and bring
their products to market. Rambus's interface solutions can be found in numerous computing, consumer, and
communications products and applications. Rambus is headquartered in Los Altos, Calif., with regional offices in
Chapel Hill, North Carolina, Taiwan and Japan. Additional information is available at
About Eureka Technology
Eureka Technology Inc. is a leading intellectual property (IP) provider for ASIC, FPGA and system designers.
The company specializes in the integration and customization of standard IP core to meet customer requirements.
Eureka offers a wide range of silicon proven system core logic and peripheral function cores for different CPU and
bus standards including PowerPC, ARM, MIPS, PCI, PCI-X, PCI Express,
Cardbus, SDR/DDR SDRAM, SDIO, CompactFlash and PCMCIA. These IP cores are
designed to improve the design time-to-market, eliminate design risks, and reduce development costs for
System-on-chip (SoC) designs. Located in Silicon Valley, California, Eureka Technology has pioneered the use
of IP cores as a standard methodology in IC design and has licensed hundreds of IP cores to many leading
companies in the semiconductor and electronic industries. With customer base in the US, Europe, Japan and
other parts of Asia, the company has built many long term business relationships with its customers after their
initial successes. Additional information is available at http://www.eurekatech.com
Eureka Technology Inc.
Tel: 650 960 3800
Web site: http://www.eurekatech.com
Eureka Technology, the Eureka logo and MemConnect is a trademark of Eureka Technology Inc.
All other trade names are the service marks, trademarks, or registered trademarks of their respective owners.
*PCI Express is a trademark of PCI-SIG