Product Summary  

 

 

EP246 AMBA AHB Direct Memory Access (DMA) Controller

Features

  • Multiple independent DMA channels with direct AHB bus interface.
  • DMA transfers between AHB memory devices and I/O ports.
  • Scatter-gather allows DMA to merge multiple data source to contiguous space.
  • Supports both hardware initiated transfer and software initiated transfer.
  • Supports burst transfer to maximize data bandwidth.
  • Automatic address increment or decrement.
  • Interrupt generation on transfer completion.
  • Burst data access on the AHB interface and user I/O interface.
  • Handles wait state insertion by any slave devices.
  • Supports all slave device responses: OKAY, RETRY, SPLIT and ERROR.
  • Master does not insert wait state on AHB bus thus maximize data bandwidth.
  • No delay insertion on data transfer between user I/O interface and AHB bus.
  • Separate user interface for DMA control register programming.
  • User interface matches seamlessly with other Eureka Technology IP cores.
  • Optimized for ASIC and PLD implementations.

Diagram

AMBA AHB Direct Memory Access (DMA) Controller

Description

The AMBA AHB Direct Memory Access (DMA) controller is designed to operate directly on the AMBA AHB bus. It contains multiple channels which can be programmed independently. Two types of DMA transfers, buffered and non-buffered transfers, are programmable to each DMA channels.

Buffered data transfer requires the DMA to read the data from the source address on the AMBA AHB bus, buffered it locally and then write to the destination. This type of transfer is typically used for transferring data between locations that reside on the AHB bus. The AHB-DMA controller provides internal data buffer for this type of transfer. Buffered data transfer can also be used for AHB-to-I/O and I/O-to-AHB transfers.

Non-buffered transfer is designed for transferring data without buffering it in the DMA. This is also called “Fly-by” DMA. This is typically used for transferring data between AHB and the dedicated IO bus. In non-buffered transfers, data passes through the AHB-DMA controller without internal buffer. Each I/O device has a dedicated bus which is directly connected to the DMA controller for data transfer. Non-buffer transfer can be used only for DMA transfers that involve I/O-to-AHB and AHB-to-I/O transfers.

To initiate a DMA transfer, the user programs the source address, destination address, transfer count, and other control information to the DMA channel through the programming port. Once it is programmed, DMA can be started either by a hardwire input signal or under software control.

Buffered transfer is designed for transferring data between locations that reside on the AMBA AHB bus. Once the transfer is started, the DMA controller arbitrates for AHB bus ownership. Once it receives bus ownership, it reads the source data from the AHB bus, using burst transfer when possible to maximize memory bandwidth. Data is stored temporarily in a local buffer. The DMA controller then re-arbitrates for bus ownership to write data from the local buffer to the destination address on AHB bus. The source address and destination address are then incremented and the transfer count decremented by the number of data words transferred. The process is repeated until the transfer count reaches zero.

AHB DMA Controller

Non-buffered DMA transfer is designed for transferring data between the AHB bus and the channel’s dedicated I/O port. Data passes through the DMA controller without using the local data buffer. Each DMA channel has a dedicated I/O port for data transfer. To transfer data from the AHB bus to the I/O port, the controller initiates a read access on the AHB bus based on the source address. Data received from the AHB bus is then driven on the I/O port immediately. To transfer data from the I/O port to the AHB bus, data is inputted to the I/O port when DMA starts. The DMA controller initiates a write access on the AHB bus destination address. Data on the I/O port is then driven on the AHB bus to write to the destination.

AMBA AHB DMA Controller

The AMBA AHB Direct Memory ACCESS (DMA) controller can be programmed to use single, burst of 4, 8, or 16 words to transfer data. If the transfer count programmed by the user is more than one burst size, the DMA controller issues multiple requests to transfer all the data. The DMA controller relinquishes the AHB bus and re-arbitrates for the bus again between each burst transfer so that other devices on the bus receive their fair share of memory bandwidth on the AHB bus.

The AMBA AHB Direct Memory Access (DMA) controller implements scatter-gather DMA chaining. A pointer to a DMA link list can be programmed in the control register. At the end of the DMA transfer when transfer count reaches zero, the controller automatically loads a new set of DMA transfer by reading from the AHB address pointed to by the link list pointer. User can set up many different DMA transfer by providing a link list in memory and have the controller execute each DMA transfer sequentially. Scatter gather is useful for merging data from different data locations into one contiguous location.