Product Summary  



EP455 EC Interface to PCI Host Bridge


  • Fully supports PCI specification 2.1 and 2.2 protocol.
  • Supports MIPS EC Interface bus protocol.
  • Downstream access transfer from MIPS EC Interface bus to PCI bus.
  • Upstream access transfer from PCI bus to internal system resources.
  • EC Interface bus and PCI bus operate at independent clock domains.
  • Total of six write buffers for data write posting for all interfaces.
  • Supports EC Interface burst transfers up to 64 bytes.
  • PCI interface includes bus master, bus target and configuration access initiation.
  • Generates standard PCI type 0 and type 1 configuration accesses.
  • Automatic handling of configuration register read/write access.
  • Supports target retry, disconnect, abort and wait state insertion.
  • Parity generation and parity error detection.
  • Includes all PCI specific configuration registers.
  • Supports high speed bus request and bus parking.
  • Optional PCI bus arbiter with fix, rotating, and custom priority.