SD Host Development System

Features

• Compatible with SD/SDIO specification 2.0 with 1 and 4 bit data transfer.
• Supports SD memory, SDIO,MMC cards.
• Supports both standard capacity and high capacity (SDHC) memory cards.
• Development system includes both hardware board and FPGA with pre-programmed controller.
• Connect to the system using 32-bit PCI bus interface.
• SD 2.0 host system recognized by any Operating Systems that supports SD bus including Windows XP.
• No special bus driver or memory device drivers needed.
• SD/MMC card automatically mapped to the system’s file system as a hard drive.
• Ideal platform for SD hardware and software development.

Diagram

Description

The SD host development system is designed for both hardware and software development of any system incorporating SD/MMC interface. This system is based on Eureka's EP550 SD host controller IP core, implemented in Xilinx Spartan3-400 FPGA with connection to the PCI and SD bus. The FPGA is pre-programmed with the SD host IP core and comes with the IP core bit-map license. When connected to the host system's PCI bus, the operating system, if it supports SD bus, automatically recognize it as an PCI-to-SD adapter.

The SD host development system's SD socket that can accept any standard SD or MMC cards. When an SD or MMC memory card is plugged in, the operating system automatically recognizes the SD/MMC card and maps the card's memory to the file system. In Windows operating system, this means that the SD/MMC card is mapped as drive D or other drive letter. Any files stored in the memory card can then be accessed by the operating system or application software.

The SD host development board includes on board FLASH device and expansion header. The JTAG connector allows the FPGA and platform Flash to be re-programmed by the user to serve as a prototype platform. Additional hardware can be added to daughter cards through the expansion header pins. The board is 5V and 3V tolerant.