Product Summary  

 

 

EP534 AMBA AHB Bus to DDR SDRAM Controller

Features

  • External pin reduction by transferring 2 bits of data per pin.
  • Supports multiple external SDRAM banks.
  • Automatic refresh generation with programmable refresh intervals.
  • Self-refresh mode to reduce system power consumption.
  • Standard delay cells or user provided DLL for DQ and DQS alignment.
  • Integrated data buffer synchronizes user interface with DDR SDRAM data.
  • Operates on both discrete DDR SDRAM chips and DDR SDRAM DIMM.
  • Programmable memory size: 4, 8, and 16 bits per SDRAM.
  • Programmable SDRAM access timing parameters.
  • Automatic refresh generation with programmable refresh intervals.

Diagram

AMBA AHB bus to DDR SDRAM Controller