EC300 PCI Bus Arbiter

Features

• Compliant with PCI bus specification 2.1 to 3.0
• Designed for ASIC and PLD implementations in various system environments.
• Supports two to eight bus masters.
• Run time selection between rotating priority or fix priority scheme.
• Bus parking.
• Single cycle request-to-grant turn around time.
• Quiet cycle during master switch.
• Master time-out.

Diagram

Description

The EC300 PCI bus arbiter performs bus arbitration among multiple masters on the PCI bus. Up to eight bus master can reside on the PCI bus and arbitrates for the bus. One pair of request and grant signal is dedicated to each bus master.

The EC300 implements both rotating priority and fix priority schemes. In rotating priority scheme. the requestor that was granted the bus most recently receives the lowest priority while the requestor position next to it receives the highest priority and the remaining requestor receives subsequently lower priority based on their position. Fix priority always assign specific priority order to each port. Rotating and fix priority scheme can be selected during run time via an input pin.

Bus parking is implemented by the arbiter. When no requestor is active, the arbiter parks the bus to the requestor that was granted the bus most recently.